From 4b8ac3c5679d7fc63ae2fce4c74faddc2d9a97d7 Mon Sep 17 00:00:00 2001
From: Carl Pearson <pearson@illinois.edu>
Date: Mon, 15 May 2017 09:42:29 -0500
Subject: [PATCH] References

---
 figures/cpu_matvec.pdf   | Bin 12063 -> 12063 bytes
 figures/kernels.pdf      | Bin 13466 -> 13466 bytes
 figures/mlfmm.pdf        | Bin 18027 -> 18027 bytes
 figures/mlfmm_bw.pdf     | Bin 16277 -> 16277 bytes
 figures/mlfmm_minsky.pdf | Bin 15684 -> 15684 bytes
 main.tex                 |  26 +++++++++++++-------------
 6 files changed, 13 insertions(+), 13 deletions(-)

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diff --git a/main.tex b/main.tex
index 5be55a5..46a1bea 100644
--- a/main.tex
+++ b/main.tex
@@ -42,7 +42,7 @@ The MLFMM is evaluated on current- and next-generation GPU-accelerated supercomp
 
 
 
-MLFMM computes pairwise interactions between pixels in the scattering problem by hierarchically clustering pixels into a spatial quad-tree. In the nearfield phase, nearby pixel interactions are computed within the lowest level of the MLFMM tree. The aggregation and disaggregation phases propagate interactions up and down the tree, and the translation phase propagates long-range interactions within a level. In this way, $\mathcal{O}(N)$ work for $N^2$ interactions is achieved for $N$ pixels~\cite{chew}.
+MLFMM computes pairwise interactions between pixels in the scattering problem by hierarchically clustering pixels into a spatial quad-tree. In the nearfield phase, nearby pixel interactions are computed within the lowest level of the MLFMM tree. The aggregation and disaggregation phases propagate interactions up and down the tree, and the translation phase propagates long-range interactions within a level. In this way, $\mathcal{O}(N)$ work for $N^2$ interactions is achieved for $N$ pixels~\cite{chew01}.
 Even with algorithmic speedup, high performance parallel MLFMM is needed to take advantage of high-performancing computing resources.
 This work presents how a GPU-accelerated MLFMM effectively scales from current to next-generation computers.
 
@@ -51,7 +51,7 @@ Common operators are pre-computed, moved to the GPU, and reused as needed to avo
 The MLFMM tree structure is partitioned among message passing interface (MPI) processes where each process employs a single GPU for performing partial multiplications.
 During the MLFMM multiplications, data is transferred between GPUs through their owning MPI processes by moving the data from GPUs to central processing units (CPUs), CPUs to CPUs through MPI, and then from CPUs to GPUs.
 To hide this communication cost, MPI communication is overlapped with GPU kernels.
-This strategy completely hides the communication cost and provides $96$\%, MPI parallelization efficiency on up to 16 GPUs.
+This strategy completely hides the communication cost and provides 96\%, MPI parallelization efficiency on up to 16 GPUs.
 
 
 \section{MLFMM Performance Results}
@@ -160,7 +160,7 @@ A 16-GPU MPI execution is not shown, as only one S822LC was available for evalua
 Both XE and S822LC achieve more CPU speedup than they have floating-point units (17x with 32 threads on 16 units for XE, 26x with 160 threads on 20 units for S822LC).
 When floating-point units are oversubscribed, they are more fully utilized.
 
-The CUDA implementations leverage well-understood techniques for optimizing  matrix operations, including hybrid shared-memory and register tiling, and thread coarsening\cite{hwu}
+The CUDA implementations leverage well-understood techniques for optimizing  matrix operations, including hybrid shared-memory and register tiling, and thread coarsening\cite{hwu11}
 In both systems, using a GPU for MLFMM provides substantial speedup (additional 3.1x on XE/XK, 9.2x on S822LC) over fully utilizing the CPUs.
 This speedup justifies the considerable time invested in a CUDA implementation.
 Furthermore, nearly linear scaling when using multiple GPUs is also achieved thanks to overlapping all required MPI communication with GPU computation.
@@ -191,17 +191,17 @@ On modern GPUs, this speedup justifies the significant CUDA time investment.
 \bibliographystyle{IEEEtran}
 \begin{thebibliography}{99}
 
-\bibitem{chew}
-V. Chew, 
-``Fast and efficient''
-in \textit{Applied and Computational Harmonic Analysis}
-1, 1 (1993), 82–93
+\bibitem{chew01}
+W. C. Chew, et al.,
+\textit{Fast and efficient algorithms in computational electromagnetics}
+Artech House, Inc.,
+2001
 
-\bibitem{hwu}
-W. Hwu, 
-``GPU Computing Gems''
-in \textit{Applied and Computational Harmonic Analysis}
-1, 1 (1993), 82–93
+\bibitem{hwu11}
+W. Hwu,
+\textit{GPU Computing Gems Emerald Edition}
+Elsevier,
+2011
 
 \bibitem{ncsa} 
 National Center for Supercomputing Applications,